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Mac SMC Sensor keys

KEYTYPESIZEATTRIBUTESDESCRIPTION
#KEYui324K_CONSTNumber of Keys
+LKSflag1K_FUNC_RReturns whether or not lock bits are set.  Returns 3 bit value, where
 each bit represents one of the three lock bit regions.  1 => set. 
 
AL!ui81K_VAR_RWEach "1" bit in gui8ALSForced indicates that a certain writable ALS
 variable has been overridden (i.e., forced) by the host OS or 
 host diagnostics, and that variable should not be written by the SMC 
 again until the applicable bit is cleared in gui8ALSForced.
 Currently, the used bits are:
    Bit 0 protects gui16ALSScale
    Bit 1 protects ui16Chan0 and ui16Chan1 of aalsvALSData
    Bit 2 protects gui16ALSLux
    Bit 3 protects fHighGain of aalsvALSData
    Bit 4 protects gai16ALSTemp[MAX_ALS_SENSORS]
 All other bits are reserved and should be cleared to 0. 
 
ALA0{ala K_VAR_ATOM_RWALS analog lux calculation information
ALA1{ala K_VAR_ATOM_RWALS analog lux calculation information
ALA2{ala K_VAR_ATOM_RWALS analog lux calculation information
ALA3{ala K_VAR_ATOM_RWALS analog lux calculation information
ALA4{ala K_VAR_ATOM_RWALS analog lux calculation information
ALA5{ala K_VAR_ATOM_RWALS analog lux calculation information
ALAT{alt K_VAR_ATOM_RWanalog lux calculation thresholds
ALI0{ali K_CONSTALS Sensor 0 Info
ALI1{ali K_CONSTALS Sensor 1 Info
ALRVui162K_CONSTALS/SIL version ID for the application program interface
ALSC{alc K_VAR_ATOM_RWALS Configuration (some fields of which are used by the SIL
 on both ALS and non-ALS systems) 
 
ALSFfp1f2K_VAR_ATOM_RWALS Scale Factor for SIL in 1.15 fixed-point representation
ALSLui162K_VAR_ATOM_RWAverage ALS Ambient Light Reading in Lux
ALT0ui162K_VAR_ATOM_RWALS Ambient Light Sensor Temperature for sensor 0 (deg C, FP16.0)
ALT1ui162K_VAR_ATOM_RWALS Ambient Light Sensor Temperature for sensor 1 (deg C, FP16.0)
ALTH{alr K_VAR_ATOM_RWALS Ambient Light Sensor Thermal Coefficient and baseline temperature
ALV0{alv K_VAR_ATOM_RWLatest ambient light reading from sensor 0
ALV1{alv K_VAR_ATOM_RWLatest ambient light reading from sensor 1
AUPOui81K_VAR_ATOM_RWAuto Power-on key.  If set to 1, system will be automatically 
 powered on by SMC after next transition to S5/G3HOT. 
 
BATPflag1K_VAR_RSystem currently being powered by battery. Used by FW TDM. Needed on all platforms.
BNumui81K_VAR_RMaximum number of supported batteries. Architecturally visiable key used by EFIUtil. Needed on all platforms.
BSInui81K_VAR_RBattery System info byte. BSIn[7:0]
 0=Charging
 1=AC present
 2=AC presence changed
 3=OS Stop Charge
 4=OS Calibration Req
 5=BatteryQueryInProgress
 6=batOK
 7=adcInProgress
 Architecturally visiable key used by EFIUtil. Needed on all platforms.  
 
CLKTui324K_FUNC_RWSMC local time in seconds since midnight
 Used to control SIL brightness on some systems based on time of day. 
 
CRCBui324K_VAR_RReturns a CRC32 value representing all of UserBootMAT.
CRCUui324K_FUNC_RGenerates a CRC32 value representing all of UserMAT.
DPLM{lim KPRIV_FUNC_WTests Plimit plumbing from SMC to OS. 3 bytes input are Cpu Plimit, Gpu Plimit, Mem Plimit.
EPCAui324K_CONSTEPM CV Start Address
EPCFflag1K_FUNC_REPM CV Flash Status 1=flashed
EPCIui324K_VAR_REPM CV Configuration ID
EPCVui162K_VAR_REPM CV Configuration Version
EPMAch8* K_FUNC_REPM Meta Table Address First set EPMI and then read EPMA
EPMIui81K_VAR_ATOM_RWEPM Meta Table Index First set EPMI and then read EPMA
EPUAui324K_CONSTEPM UV Start Address
EPUFflag1K_FUNC_REPM UV Flash Status. 1=flashed
EPUIui324K_VAR_REPM UV Configuration ID
EPUVui162K_VAR_REPM UV Configuration Version
EVCTui162K_FUNC_REvent Trace Buffer. Returns a 2 byte value. The first byte is the number of events
 that have been put into the trace buffer since the last time this key was read and the second
 is the index into the buffer for the next event to be written. 
 If they are not the same, then the trace buffer has been overwritten and more then 16 events 
 have occured since the last time it was read  
 
EVMDui324K_FUNC_WEvent Mode. Used for debug to determine if we should reset SMC or jump into flasher on
 a detected SMC health check. If key is written to a value of 0x87126534, then we will jump into the 
 flasher on any SMC health check. 
 
EVRDch8* K_FUNC_REvent Trace Buffer Read. 32 byte read from event trace buffer. Issue key read 4 times to
 read entire event trace buffer  
 
F0Acfpe22K_VAR_ATOM_RWFan0 Actual RPM, DIAG_LOG
F0ID{fds K_CONSTFan0 Description
F0Mnfpe22K_VAR_ATOM_RWFan0 Minimum RPM
F0Mtui162K_VAR_ATOM_RWFan0 Max calculated target RPM
F0Mxfpe22K_VAR_ATOM_RWFan0 Maximum RPM
F0Sffpe22K_VAR_ATOM_RWFan0 Safe RPM
F0Tgfpe22K_VAR_ATOM_RWModify this in conjunction with Fan force bit [0] to set fan speed.  
 
F1Acfpe22K_VAR_ATOM_RWFan1 Actual RPM
F1ID{fds K_CONSTFan1 Description
F1Mnfpe22K_VAR_ATOM_RWFan1 Minimum RPM
F1Mtui162K_VAR_ATOM_RWFan1 Max calculated target RPM
F1Mxfpe22K_VAR_ATOM_RWFan1 Maximum RPM
F1Sffpe22K_VAR_ATOM_RWFan1 Safe RPM
F1Tgfpe22K_VAR_ATOM_RWModify this in conjunction with Fan force bit [1] to set fan speed.  
 
F2Acfpe22K_VAR_ATOM_RWFan2 Actual RPM
F2ID{fds K_CONSTFan2 Description
F2Mnfpe22K_VAR_ATOM_RWFan2 Minimum RPM
F2Mtui162K_VAR_ATOM_RWFan2 Max calculated target RPM
F2Mxfpe22K_VAR_ATOM_RWFan2 Maximum RPM
F2Sffpe22K_VAR_ATOM_RWFan2 Safe RPM
F2Tgfpe22K_VAR_ATOM_RWModify this in conjunction with Fan force bit [2] to set fan speed.  
 
FNumui81K_CONSTNumber of supported fans.
FPhzsi162KPRIV_VAR_ATOM_RWProgrammable Fan Phase offset affects all fans.  Signed value
  has legal values between 0 and 360.  Default is 360 (no change). 
 
FS!ui162K_VAR_ATOM_RWFan force bits. FS![15:0] Setting bit to 1 allows for external control over fan speed target and
 prevents thermal manager from actively overidding value set via key access. 
 
GCIDui324K_VAR_ATOM_RWGraphics Card Identification.  Communicates the graphics
 card's Device ID (DID) and Vendor ID (VID) to the SMC so that the SMC
 can communicate with that graphics card's thermal sensor(s).  The 32-bit
 value that is written to this key contains the graphics card's DID in
 its most-significant 16 bits, and the VID occupies the least-significant
 16-bits. 
 
GPU!ui81K_VAR_ATOM_RWMXM GPU Force bits[7:0]: GPU![0] = GTHR force override
 bit. 
 
GTHRui81K_VAR_ATOM_RWMXM_GPU_AC_BATT_L. Drive SMC output with written value.
 Needs to be written in conjunction with GPU![0].  
 
HBWKflag1K_VAR_RWAllows a one-time lid-open event to "wake" the system from S5.
HDBSui81K_VAR_ATOM_RHang Detect. A/B switch value
HDSTui162K_VAR_ATOM_RHang Detect. Current System State Machine value
HDSWui324K_VAR_ATOM_RHang Detect. {Sleep[15:0]|Wake[15:0]} Count.
IC0Cfp792K_VAR_ATOM_RWCPU 0 core current.
ID0Rfp5b2K_VAR_ATOM_RWDC In S0 rail current.
ID5Rfp4c2K_VAR_ATOM_RWDC In S5 rail current.
IG0Rfp4c2K_VAR_ATOM_RWGPU 0 rail current.
IG0rui162K_VAR_ATOM_RWGPU 0 rail current. Raw ADC input value.
LAcNui81KPRIV_FUNC_WQueue up ACPI Notify byte
LAtNui162KPRIV_FUNC_WQueue up Proprietary ATTN_IF Notify byte
LCCNui81K_VAR_RLPC Debug counter data: Num of Acpi Notifies
LCCQui81K_VAR_RLPC Debug counter data: Num of Acpi Queries
LCKAui81K_VAR_RLPC Debug counter data: Num of Key Accesses
LCSAui81K_VAR_RLPC Debug counter data: Num of Smb Accesses
LCTNui81K_VAR_RLPC Debug counter data: Num of Attn Notifies
LCTQui81K_VAR_RLPC Debug counter data: Num of Attn Queries
LDSPflag1K_VAR_WWhen OS X sleeps due to a lid-closed event, it writes a 1 in this key.
LS!ui81K_VAR_RWEach "1" bit in gui8LmsForced indicates that a certain writable SIL
 variable has been overridden (i.e., forced) by the host OS or 
 host diagnostics, and that variable should not be written by the SMC 
 again until the applicable bit is cleared in gui8LmsForced.
 Currently, this is just a place-holder.  All bits are reserved and 
 should be cleared to 0. 
 
LSCF{lsc K_VAR_ATOM_RWLmsConfig structure provides overall system-specific config info for the SIL.
LSDD{lsd K_VAR_ATOM_RWLmsDwell structures provide dwell fade-down configuration
LSDU{lsd K_VAR_ATOM_RWLmsDwell structures provide dwell fade-up configuration
LSFD{lsf K_VAR_ATOM_RWLmsFlare structures provide flare config for non-breathing fade-down
LSFU{lsf K_VAR_ATOM_RWLmsFlare structures provide flare config for non-breathing fade-up
LSLB{pwm K_VAR_ATOM_RWSIL's PWM "Full On" value (usually 0xFFFF, used for power switch override)
LSLF{pwm K_VAR_ATOM_RWSIL's PWM "Off" value (usually 0)
LSLN{pwm K_VAR_ATOM_RWSIL's PWM "On" value (varies per system)
LSOFflag1K_VAR_RReads TRUE (1) if the SIL is Off
LSOOflag1K_FUNC_Wui8LmsSetOnOff is a function called by the OS to set
 the SIL to either on (max brightness, flag=1) or off (flag = 0). 
 
LSPV{pwm K_VAR_RSIL's Current PWM value
LSRBflag1K_FUNC_Wui8LmsRevertToSSMBehavior is a function called by the OS to revert the
 SIL's behavior to the most recent behavior requested by the SMC's system
 state machine. 
 
LSSB{lso K_FUNC_Wui8LmsSetBehavior is a function called by the OS to override the SIL's
 behavior.  The calling parameters must conform to the
 LmsOverrideBehavior struct. 
 
LSSEflag1K_VAR_RWgfLmsMaxBrightScalingEnabled lets diagnotics enable and
 disable the SIL's per-unit max brightness scaling.  This flag will
 normally be 1 (i.e, TRUE), which enables per-unit scaling.  Set this
 flag to 0 (FALSE) to disable per-unit scaling.  
 
LSSS{lso K_FUNC_Wui8LmsSetSSMBehavior is a function called by the OS to
 override the SIL's behavior while pretending to be the SMC's System
 State Machine (host software should normally use LSSB instead of this
 special-purpose key).  The calling parameters must conform to the
 LmsOverrideBehavior struct. 
 
LSSVui162K_VAR_RWgui16LmsMaxBrightScale holds the SIL's per-unit max 
 brightness scale value.  A value of 0xFFFF indicates that no scaling
 will be done for this particular unit.  
 
LSUPui81K_FUNC_Wui8LmsUpdateBehaviorParams is a function called by the SIL tuning
 application to force an update of the SIL's behavior parameters at the
 user's implicit request (i.e., after the user updates underlying data
 that affects the behavior params). 
 
MACAui324K_VAR_ATOM_RWMemory Address Cycle Address. Sets the address for subsequent MACR calls
MACMflag1K_VAR_ATOM_RWMemory Address Cycle Mode. Sets the addressing mode for MACR calls. Defaults to auto-incrementing
MACRch8* K_FUNC_RMemory Address Cycle Read. Reads 32 bytes from SMC @ address pointed to by MACA. Restricted to EPM address range. If
 MACM==1 then MACA will be incremented by 32 bytes at the completion of the read. 
 
MOCFui162K_VAR_ATOM_RWMOtion sensor (SMS) Configuration register
MOCNui162K_VAR_ATOM_RWMOtion sensor (SMS) Control register - enables accelerometer and threshold testing
MSALui81KWPRIV_FUNC_RWAllows control of the thermal routine's behavior for debug and testing purposes.
7 - Unused
6 - Plimits enabled.  0 => thermal routine will not send plimits, but
    all other thermal code is still active.  1 => routine sends plimits
    normally, assuming routine is active.
5 - Unused  
4 - Unused  
3 - Thermal Subsystem Operating Normally, read-only.  If this bit is 1,
    the SMC's thermal subsystem is operating normally.  If it is 0, then
    the thermal code is disabled, fans are set to max RPM, and plimits
    are all set to max.  On systems that require a throttle selector
    table in the UV EPM block, this bit will be set to 0 if the throttle
    selector table is invalid or is missing.
2 - Valid current/power calibration coefficients in UV EPM block,
    read-only.
1 - Prochot Enable
0 - Thermtrip Enable 
 
MSAcfp882K_VAR_ATOM_RReturns the average CPU PLIMIT sent by the SMC, DIAG_LOG
MSAgfp882K_VAR_ATOM_RReturns the average GPU PLIMIT sent by the SMC, DIAG_LOG
MSAmfp882K_VAR_ATOM_RReturns the average MEM PLIMIT sent by the SMC, DIAG_LOG
MSC0ui162K_VAR_ATOM_RWCalibration key
MSC1ui162K_VAR_ATOM_RWCalibration key
MSC2ui162K_VAR_ATOM_RWCalibration key
MSC3ui162K_VAR_ATOM_RWCalibration key
MSCPui162K_VAR_ATOM_RWTotal number of sub samples to calibrate with
MSCRui162K_VAR_ATOM_RWTotal number of sub samples to calibrate with
MSCSui81K_FUNC_WCalibration Start key - Writing a value of 0x11 to this key will begin
MSCTui81K_VAR_ATOM_RWTotal number of samples to calibrate with
MSCaui162K_VAR_ATOM_RWCalibration key
MSCbui162K_VAR_ATOM_RWCalibration key
MSCcui162K_VAR_ATOM_RWCalibration key
MSCdui162K_VAR_ATOM_RWCalibration key
MSClui162K_VAR_ATOM_RWCalibration key
MSCmui162K_VAR_ATOM_RWCalibration key
MSCnui162K_VAR_ATOM_RWCalibration key
MSCoui162K_VAR_ATOM_RWCalibration key
MSDIflag1K_VAR_RIndicates whether an optical disk has been inserted in the
 optical disk drive (1) or the drive is empty (0).  
 
MSDWflag1K_FUNC_Wui8SSMDisplayWakeSleep is a function called by the OS to notify the SMC
 that the display is now awake (i.e., on) or asleep (i.e. off), so that
 the SMC can set the correct behavior for the Status Indicator Light.  
 
MSHAfp792K_VAR_ATOM_RAverage HDD activity (range 0 to 1) in U7.9 format.
MSLDui81K_VAR_RReturns the current Lid Switch state
MSPAfp6a2K_VAR_ATOM_RAverage count of prochot assertions between 0 and 1 in 6.10 format, DIAG_LOG.
MSPCui81K_FUNC_RWreads and writes the number of available "Power states" for the CPU.
MSPS{msp K_VAR_RReturns the current (enumerated) system power state exported by the 
 SMC's System State Machine.  
 
MSSDsi81K_FUNC_RWStores the last known Shut-down cause.
 STOP_CAUSE_SHUTDOWN_GOOD_CODE        5
 STOP_CAUSE_SLEEP_GOOD_CODE           5
 STOP_CAUSE_POWERKEY_GOOD_CODE        3
 SLEEP_CAUSE_SLEEP_LOWBATT_CODE       2     // Deprecated. Use STOP_CAUSE_LOWBATT
 SLEEP_CAUSE_SLEEP_OVERTEMP_CODE      1     // Deprecated. Use appropriate STOP_CAUSE_TEMP*
 STOP_CAUSE_INIT_CODE                 0     // Initial code
 STOP_CAUSE_HEALTHCHECK_CODE          -1    // 0xFF
 STOP_CAUSE_PS_CODE                   -2    // 0xFE
 STOP_CAUSE_TEMP_MULTISLEEP_CODE      -3    // 0xFD
 STOP_CAUSE_SENSORFAN_CODE            -4    // 0xFC
 STOP_CAUSE_TEMP_OVERLIMITTO_CODE     -30   // 0xE2
 STOP_CAUSE_PSWRSMRST_CODE            -40   // 0xD8
 STOP_CAUSE_UNMAPPED_CODE             -50   // 0xCE Deprecated because it should never occur
 STOP_CAUSE_LOWBATT_CODE              -60   // 0xC4
 STOP_CAUSE_NINJA_SHUTDOWN_CODE       -61   // 0xFF
 STOP_CAUSE_NINJA_RESTART_CODE        -62   // 0xC2
 STOP_CAUSE_TEMP_PALM_CODE            -70   // 0xBA
 STOP_CAUSE_TEMP_SODIMM_CODE          -71   // 0xB9
 STOP_CAUSE_TEMP_HEATPIPE_CODE        -72   // 0xB8
 STOP_CAUSE_TEMP_BATT_CODE            -74   // 0xB6
 STOP_CAUSE_ADAPTERTO_CODE            -75   // 0xB5
 STOP_CAUSE_TEMP_MANUAL_CODE          -77   // 0xB3 Not currently used.
 STOP_CAUSE_CURRENT_ADAPTER_CODE      -78   // 0xB2
 STOP_CAUSE_CURRENT_BATT_CODE         -79   // 0xB1
 STOP_CAUSE_TEMP_SKIN_CODE            -82   // 0xAE
 STOP_CAUSE_TEMP_BACKUP_CODE          -84   // 0xAC
 STOP_CAUSE_TEMP_SKIN_BOTHBAD_CODE    -83   // 0xAB Will die with M57, M59, M75, M76
 STOP_CAUSE_TEMP_CPUPROX_CODE         -86   // 0xAA
 STOP_CAUSE_TEMP_CPU_CODE             -95   // 0xA1
 STOP_CAUSE_TEMP_PS_CODE              -100  // 0x9C
 STOP_CAUSE_TEMP_LCD_CODE             -101  // 0x9B
 STOP_CAUSE_RSM_POWER_FAIL_CODE       -102  // 0x9A
 STOP_CAUSE_BATT_CUV_CODE             -103  // 0x99
 STOP_CAUSE_UNKNOWN_CODE              -128  // 0x80 for unknown shutdown cause
  
 
MSSFui324K_FUNC_RWBad fan flag bits. A bit-vector in which each bit position represents a corresponding fan status. The 
 bit-vector is write-one-to-clear for each fan/bit position 
 
MSSPsi81K_VAR_RWStores the last known Sleep Request cause. See MSSD for list of causes.
MSSS{mss K_VAR_RReturns the current (enumerated) state of the SMC's System State Machine
MSTCui162K_VAR_ATOM_RW- ScratchPad register that outputs via Tlog so that a script running on the SUT can add to the log what test case was running.
MSTMui81K_FUNC_RReturns whether power balancing is enabled or not.
MSTcui81K_VAR_ATOM_RReturns the last CPU PLIMIT sent by the SMC
MSTgui81K_VAR_ATOM_RReturns the last GPU PLIMIT sent by the SMC
MSTmui81K_VAR_ATOM_RReturns the last MEM PLIMIT sent by the SMC
MSWRui81K_FUNC_Wui8SSMStartWarmReset is a function called by the OS to notify that SMC 
 that a warm reset is beginning. 
 
NATJui81K_VAR_RWNinja Action Timer Job.  This job is performed when the Ninja Action Timer
 counts down to zero.  Job can be any of:
 0 = Do Nothing
 1 = Force Shutdown to S5
 2 = Force Restart
 3 = Force Startup
 4 = reserved 
 
NATiui162K_VAR_ATOM_RWNinja Action Timer.  This timer can be set to the number of seconds before a job
 (defined in NATJ) is performed.  Value is in seconds and counts down to zero.  Setting to zero
 cancels any previously set timer. 
 
NTOKui81K_FUNC_WKey for OS X to write to turn on Proprietary Host Notifies.
ONMIui81K_VAR_ATOM_RWNMI flag (For OS NMI)
PC0Cfp882K_VAR_ATOM_RWCPU 0 core power
PC0cui162K_VAR_ATOM_RWCPU 0 core power. Raw ADC input value.
PD0Rfp882K_VAR_ATOM_RWDC-In MLB S0 rail power
PD5Rfp882K_VAR_ATOM_RWDC-In MLB S5 rail power
PDMRfp882K_VAR_ATOM_RWDC-In MLB Total (S0+S5) power
PDTRfpa62K_VAR_ATOM_RWDC-In System Total (S0+S5+LCD+HDD) power
PG0Rfp882K_VAR_ATOM_RWGPU0 rail power
PZ0Efp882K_VAR_ATOM_RWZone0 average target power (PC0C+PG0R)
PZ0Gfp882K_VAR_ATOM_RWZone0 average power (PC0C+PG0R)
RBrch8* K_DESC_STRSource branch
REV{rev K_CONSTSource revision
RMdechar1K_CONSTMode. What code is currently being executed. 'B'=base flasher, 'U'=update flasher or 'A'=app code
RPltch8* K_CONSTPlatform String
RSvnui324K_CONSTSVN database revision
RVBF{rev K_FUNC_RBase flasher revision
RVUF{rev K_FUNC_RUpdate flasher revision
SAS!ui324KWPRIV_VAR_ATOM_RWADC sensor force bits [31:0]. Setting bit(s) will prevent periodic ADC conversion cycle from overwriting
 sensor data for selected channels. 
 
SBFui162K_VAR_ATOM_RBad sensor flags.  One per PID, defined as follows:
 PID  Bit   Hex     Dec
 ---  ---  ------   ---
 CPU   0   0x0001     1
 GPU   1   0x0002     2
 HDD   2   0x0004     4
 ODD   3   0x0008     8
 PS    4   0x0010    16
 LCD   5   0x0020    32 
 
SBFCui162K_VAR_ATOM_RWWhen a bit has been set by the SMC in SBF key and is then subsequently reset by writing
 this key, it will cause the appropriate data elements for the PID to be reset 
 and the pid will resume normal behaviour if it's sensors are working properly again. 
 Note that it may take a few minutes for the fans associated with that PID loop to return 
 to normal speed due to PID loop tuning. 
 
SBFEflag1K_VAR_ATOM_RWThe state of this flag determines whether vTmBadSensorCheck
 will display sensor error codes instead of actual temperatures when it
 detects unstable temperatures or temperatures that are below the allowed
 minimum.  Defaults to TRUE (displays error codes).
 
SCIAui162K_FUNC_RWLpc Base Address for SCIF, default is 0x3F8
SCILui81K_FUNC_RWSet this to 1 to enable SCIF to be LPC slave for EFI debug
SCTgsp782K_VAR_ATOM_RWCPU Thermal Target Temp
SDPEui81K_VAR_ATOM_RWMode bit to enable polling of developmental build sensors. Default state will vary depending on build.
SDRdui162K_FUNC_WDelayed sensor read. Writing a value in ms will cause the SMC to start a timer which when
 expires will cause the SMC to set force bits for polled sensors. This effectively allows a follow on
 query to sample the state of the sensors at the desired time. Value in ms. 
 
SGHTui81K_VAR_ATOM_RSensor Graphics HoT. 1 = GPU Overtemp.
SGTTsp782K_VAR_ATOM_RWGPU Heatsink Throttle Threshold Temperature.  If the GPU's
 heatsink temperature exceeds this temperature, the SMC will assert the
 GPU's throttle to slow and cool the GPU.  
 
SGTgsp782K_VAR_ATOM_RWGPU Thermal Target Temp
SHTgsp782K_VAR_ATOM_RWHDD Thermal Target Temp
SIS!ui162KWPRIV_VAR_ATOM_RWI2C sensor force bits. Setting bit(s) will prevent periodic
 I2C polling cycle overwriting sensor data. This key is intended for
 expert use only.  Bit mappings for M72/M78/K2/K3 are as follows:
 
 Bit   Hex      Dec    Key   Description
 ---  ------   -----   ----  ------------
  0   0x0001       1   TC0H  CPU Heatsink
  1   0x0002       2   TG0H  GPU Heatsink
  2   0x0004       4   TH0P  HDD Proximity
  3   0x0008       8   TO0P  ODD Proximity
  4   0x0010      16   Tm0P  MLB Proximity
  5   0x0020      32   TA0P  Ambient
  6   0x0040      64   Tp0P  Power Supply Proximity
  7   0x0080     128   TW0P  Wireless (Airport) Proximity
  8   0x0100     256   TC0P  CPU Proximity
  9   0x0200     512   TC0D  CPU Die
 10   0x0400    1024   TG0P  GPU Proximity
 11   0x0800    2048   TG0D  GPU Die
 12   0x1000    4096   TL0P  LCD Proximity
 13   0x2000    8192   SGTT  GPU Heatsink Throttle Threshold
 
 Special error codes (used by individual temperature keys, not by SIS!):
  Hex     Dec    Description
 ------  -----   -----------
 0x7FE7   127.9  Hot temperature
 0x8400  -124    Unstable temperature
 0x8300  -125    Temperature below allowed minimum
 0x8200  -126    Sensor failed to initialize
 0x8100  -127    Sensor skipped
 0x8000  -128    Temperature can't be read 
 
SLPTsp782K_VAR_ATOM_RWLCD Prochot threshold. TL0P temp at which Prochot will be asserted.
SLSTsp782K_VAR_ATOM_RWLCD Sleep threshold. TL0P temp at which Sleep will be requested.
SLTgsp782K_VAR_ATOM_RWLCD Fan Temp Target
SLTpsp782K_VAR_ATOM_RWLCD Power Temp Target
SOTgsp782K_VAR_ATOM_RWODD Thermal Target Temp
SPH0ui162K_VAR_RCPU Prochot event count since last boot
SPHRui324K_VAR_ATOM_RAny bit set to 1 identifies an active Prochot requestor.
 For K2/K3, the following bits are defined:
 Bit 31:  User-forced Prochot
 Bit 30:  RSVD for "Prochot forever in lieu of Thermtrip" (currently unused)
 Bits 4-29:  RSVD
 Bit  3:  Prochot Power Index
 Bit  2:  Power-supply overcurrent
 Bit  1:  Power-supply overtemp
 Bit  0:  LCD panel overtemp 
 
SPHSui81K_VAR_ATOM_RWIndicates if PROCHOT was ever set after entering S0, DIAG_LOG
SPHTui162K_VAR_ATOM_RCurrent state of all Prochots and whether the SMC itself is
 asserting each one.
 Bits 0-7:   Prochot state for CPUs 0-7, respectively (1 bit per CPU).
             1 = Prochot asserted.  0 = Prochot deasserted.
 Bits 8-15:  The SMC itself is asserting Prochot for CPUs 0-7,
             respectively (1 bit per CPU; bit 8 corresponds to CPU 0,
             bit 15 corresponds to CPU 7).
             1 = SMC is asserting Prochot to that CPU.
             0 = SMC is NOT asserting Prochot to that CPU.
 
 
SPHZui81K_FUNC_WDrive SMC Prochot(s).  In the single byte of write data,
 bits 0 through 7 control the Prochots for CPUs 0 through 7,
 respectively.  For example, writing 0x01 sets Prochot for CPU 0, while
 writing 0x80 sets Prochot for CPU 7, and writing 0xFF sets all 8
 Prochots.  Setting bits for CPUs that don't exist does nothing
 and causes no harm.
 
 
SPS!ui162KWPRIV_VAR_ATOM_RWPower force bits. Setting bit(s) will prevent periodic power calculations from overwriting
 existing data. Bit mapping varies by platform and is intended for expert use only. 
 
SpCPfps42K_VAR_ATOM_RRead-only PS I-squared sum Prochot threshold in U27.4 format.
 Sample computation:  [(Prochot threshold in watts)/12v]^2 * (Filter depth = 24576)
                      Hex value is the above * 16. 
 
SpCSfps42K_VAR_ATOM_RRead-only PS I-squared sum target for P3-level PS current control, in U27.4 format.
 Sample computation:  [(Target in watts)/12v]^2 * (Filter depth = 24576)
                      Hex value is the above * 16. 
 
SpCTfpc42K_VAR_ATOM_RRead-only PS I-squared target (non-summed) for initializing PS current control filter history, in U12.4 format.
 Sample computation:  [(Target in watts)/12v]^2.
                      Hex value is the above * 16. 
 
SpPTsp782K_VAR_ATOM_RWPS Prochot threshold. Tp0P temp at which Prochot will be asserted
SpSTsp782K_VAR_ATOM_RWPS Sleep threshold. Tp0P temp at which Sleep will be requested.
SpTgsp782K_VAR_ATOM_RWPS Fan Temp Target
TA0Psp782K_VAR_ATOM_RWAmbient temp
TC0Dsp782K_VAR_ATOM_RWCPU 0 die temp
TC0Hsp782K_VAR_ATOM_RWCPU 0 Heatsink temp
TC0Psp782K_VAR_ATOM_RWCPU 0 Proximity temp
TG0Dsp782K_VAR_ATOM_RWGPU 0 die temp
TG0Hsp782K_VAR_ATOM_RWGPU 0 Heatsink temp
TG0Psp782K_VAR_ATOM_RWGPU 0 Proximity temp
TH0Psp782K_VAR_ATOM_RWHardDisk proximity temp
TL0Psp782K_VAR_ATOM_RWLCD proximity temp
TO0Psp782K_VAR_ATOM_RWOptical Drive proximity temp
TW0Psp782K_VAR_ATOM_RWAirport temp
Tm0Psp782K_VAR_ATOM_RWMisc Local temp
Tp0Psp782K_VAR_ATOM_RWPower Supply Proximity temp
UPRCui162K_CONSTType of SMC microcontroller upon which system is based (value of UPROC macro)
VC0Cfp1f2K_VAR_ATOM_RWCPU 0 core voltage.
VC0cui162K_VAR_ATOM_RWCPU 0 core voltage. Raw ADC input value.
VD0Rfp4c2K_VAR_ATOM_RWDC In S0 rail voltage.
VD5Rfp4c2K_VAR_ATOM_RWDC In S5 rail voltage.
VG0Rfp4c2K_VAR_ATOM_RWGPU 0 rail voltage.
VG0rui162K_VAR_ATOM_RWGPU 0 rail voltage. Raw ADC input value.
dBA0sp782K_VAR_ATOM_RAcoustic Reporting. Fan 0 Noise Component (dBA).
dBA1sp782K_VAR_ATOM_RAcoustic Reporting. Fan 1 Noise Component (dBA).
dBA2sp782K_VAR_ATOM_RAcoustic Reporting. Fan 2 Noise Component (dBA).
dBAHsp782K_VAR_ATOM_RAcoustic Reporting. HDD Noise Component (dBDA).
dBATsp782K_VAR_ATOM_RAcoustic Reporting. Total Noise of all calculated components (dBDA).
zDBGui81K_FUNC_RWSet this to 1 to enable SCIF debug output to USB 0 Port
{ala\0\0\0\0 K_DESC_STRALS analog lux calculation information.
struct ALSLuxLine {
   UInt16 ui16ALSM;         // Slope of line.
   Int16  i16ALSB;          // Y-Intercept of line.
   UInt16 ui16ALSR;         // Region.
}

 
{alc\0\0\0\0 K_DESC_STRALSConfig structure contains global ALS configuration and tuning info
struct ALSConfig { 
   UInt16 ui16ALSI2CTime;   // Int interval (ms) for ALS I2C task.
   UInt16 ui16ALSADCTime;   // Int interval (ms) for ALS ADC ISR.
   UInt16 ui16LMax;         // Maximum cd/m^2 for SIL.
   UInt16 ui16LMin;         // Minimum cd/m^2 for SIL.
   UInt16 ui16ELow;         // Low room illum threshold (lux).
   UInt16 ui16EHigh;        // High room illum threshold (lux).
   UInt16 ui16Reflect;      // Bezel reflection coefficient.
   UInt8  ui8ALSSensors;    // Actual number of ALS sensors in system.
   UInt8  ui8LidDelay;      // Delay after lid opens (in tenths of seconds)
                            //   during which ALS readings don't affect the 
                            //   SIL.
}

 
{ali\0\0\0\0 K_DESC_STRALSSensor structure contains sensor-specific information for this system
enum ALSType { NoSensor, BS520, TSL2561CS, LX1973A, ISL29003 };

struct ALSSensor {
   enum  ALSType alstALSType;  // Type of sensor.
   Flag  fValidWhenLidClosed;  // TRUE if no lid or if sensor works with
                               // closed lid.  FALSE otherwise.
   Flag  fControlSIL;          // TRUE if the SIL brightness depends on
                               // this sensor's value.  FALSE otherwise.
}
 
 
{alr\0\0\0\0 K_DESC_STRALS analog lux temperature coefficients.
struct ALSTherm {
   Int16 i16ALSTempBase;    // Temperature baseline (deg C, FP16.0)
   UInt16 ui16ALSTempCoefV; // Temperature coeff (ADC Counts/deg C, FP12.4)
   UInt16 ui16ALSTempInflV; // Thermal compensation inflection point voltage
                            //   (ADCCounts, FP16.0)
   Int16 i16ALSTempLow;     // Low temperature boundary (deg C, FP16.0)
   Int16 i16ALSTempHigh;    // High temperature boundary (deg C, FP16.0)
}

 
{alt\0\0\0\0 K_DESC_STRALS analog lux calculation thresholds.
struct ALSLuxThrsh {
   UInt16 ui16ALSThrshLow;  // ADC threshold while in low gain.
   UInt16 ui16ALSThrshHigh; // ADC threshold while in high gain.
}

 
{alv\0\0\0\0 K_DESC_STRALSValue structure contains latest ambient light info from 1 sensor
struct ALSValue {
   Flag fValid;                    // If TRUE, data in this struct is valid.
   Flag fHighGain;                 // If TRUE, ui16Chan0/1 are high-gain
                                   // readings.  If FALSE, ui16Chan0/1 are
                                   // low-gain readings.
   UInt16 ui16Chan0;               // I2C channel 0 data or analog(ADC) data.
   UInt16 ui16Chan1;               // I2C channel 1 data.
 The following field only exists on systems that send ALS change
 notifications to the OS:
   UInt32 ui32RoomLux;             // Room illumination in lux, FP18.14.
}

 
{fds\0\0\0\0 K_DESC_STRFan Diag description
typedef struct fanTypeDescStruct {
   FanType       type;
   UInt8         ui8Zone;
   LocationType  location;
   UChar         rsvd;   // padding to get us to 16 bytes
   char          strFunction[DIAG_FUNCTION_STR_LEN];
} FanTypeDescStruct;


 FAN constants

      +---+
    z/   /|   
    /   / |   
   +---+  |
   |   |  +
  y|   | /
   |   |/
   +---+
     x
             
typedef enum { LEFT_LOWER_FRONT, CENTER_LOWER_FRONT, RIGHT_LOWER_FRONT,
               LEFT_MID_FRONT,   CENTER_MID_FRONT,   RIGHT_MID_FRONT,
               LEFT_UPPER_FRONT, CENTER_UPPER_FRONT, RIGHT_UPPER_FRONT,
               LEFT_LOWER_REAR,  CENTER_LOWER_REAR,  RIGHT_LOWER_REAR,
               LEFT_MID_REAR,    CENTER_MID_REAR,    RIGHT_MID_REAR,
               LEFT_UPPER_REAR,  CENTER_UPPER_REAR,  RIGHT_UPPER_REAR } LocationType;

typedef enum { FAN_PWM_TACH, FAN_RPM, PUMP_PWM, PUMP_RPM, FAN_PWM_NOTACH, EMPTY_PLACEHOLDER } FanType; 

 
{lim\0\0\0\0 KPRIV_DESC_STRPlimits group is 3 UInt8s:
 MSB: Cpu Limit
      Gpu Limit
 LSB: Mem Limit

 
{lsc\0\0\0\0 K_DESC_STRLmsConfig structure provides overall system-specific config info for the SIL.
 See "{pwm" for details on PWMValue
 See "{lsm" for details on LmsScaleMode

struct LmsConfig {
   PWMValue modvBrightnessBreatheMin;     // Breathe dwell PWM setting
   PWMValue modvMaxChangePerTick;         // Max PWM change per 1/152 sec
   UInt16 ui16ScaleConstant;              // Scale constant (1.15 fixed-point
                                          // representation) if not using
                                          //   ALS or TOD scaling
   LmsScaleMode lmsmScaleMode;            // Scale by ALS, TOD, or constant
   UInt8 ui8RampDuration;                 // Ramp length (equals 152 *
                                          //   ramp time in seconds)
   Flag fPowerSwitchOverridesSIL;         // TRUE if pressing the power
                                          //   switch should force the
                                          //   SIL to full brightness
   UInt8 ui8MinTicksToTarget;             // Slow the slew rate so that
                                          //   it takes at least this many
                                          //   ticks to reach the target
                                          //   from the prev PWM value.
}

 
{lsd\0\0\0\0 K_DESC_STR LmsDwell structures provide dwell fade-up/down configuration
struct LmsDwell {
   UInt16 ui16MidToStartRatio; // Mid-step size / start-step  size
   UInt16 ui16MidToEndRatio;   // Mid-step size / end-step    size
   UInt16 ui16StartTicks;      // # of ticks using start-step size
   UInt16 ui16EndTicks;        // # of ticks using end-step   size
}

 
{lsf\0\0\0\0 K_DESC_STRLmsFlare structures provide flare config for non-breathing fade-up/down
 See "{pwm" for details on PWMValue

struct LmsFlare {
   PWMValue modvFlareCeiling;  // Flare algorithm is active below this value.
   PWMValue modvMinChange;     // Minimum rate of change while flaring.
   UInt16   ui16FlareAdjust;   // Smaller value causes stronger flare as
}                              //   PWM value descends below modvFlareCeiling.

 
{lsm\0\0\0\0 K_DESC_STRLmsScaleMode enum
enum LmsScaleMode { kLmsScaleALS,        // Use ALS autoscale
                    kLmsScaleTOD,        // Use TOD autoscale
                    kLmsScaleConst       // Scale only by a constant
                  }

 
{lso\0\0\0\0 K_DESC_STRLmsOverrideBehavior structure provides a means to override the SIL's 
 behavior.
 See "{lss" for details on LmsSelect

struct LmsOverrideBehavior {
   LmsSelect lmssTargetBehavior;  // Enumerated SIL behavior
   Flag fRamp;                    // Set to 1 (LMS_RAMP) for a slew-rate
                                  //   controlled transition.  Set to 0
                                  //   (LMS_NO_RAMP) for a step change.
}
 
 
{lss\0\0\0\0 K_DESC_STRLmsSelect behavior enum
enum LmsSelect { kLmsOff,              // SIL off
                 kLmsOn,               // SIL on,        autoscale OK
                 kLmsBreathe,          // SIL breathing, autoscale OK
                 kLmsBrightNoScale     // SIL on bright, no autoscale
                                       //   (for power switch override)
               }

 
{msp\0\0\0\0 K_DESC_STRSSMPowerState typedef
 enum SSMPowerState { SSM_POWER_STATE_S0     = 0,
                     SSM_POWER_STATE_S3     = 1,
                     SSM_POWER_STATE_S4     = 2,
                     SSM_POWER_STATE_S5     = 3,
                     SSM_POWER_STATE_G3_AC  = 4,
                     SSM_POWER_STATE_G3_HOT = 5,
                     SSM_POWER_STATE_QUERY  = 6,
                   }
 
 
{mss\0\0\0\0 K_DESC_STRSSMState typedef
enum SSMState { SSM_S0_DISP_WAKE        = 0,
                SSM_S0_DISP_SLEEP       = 1,
                SSM_G3_HOT              = 2,
                SSM_S3_SLEEP            = 3,
                SSM_S4_HIBER            = 4,
                SSM_S5_OFF              = 5,
                SSM_S0_ASP_WAIT         = 6,
                SSM_S0_IMVP_WAIT        = 7,
                SSM_S0_EARLY_DISP_SLEEP = 8,
                SSM_S0_EARLY_DISP_WAKE  = 9,
                SSM_S3_EARLY            = 10,
                SSM_S4_EARLY            = 11,
                SSM_QUERY               = 12,
                SSM_ICH_RST             = 13,
                SSM_G2_BATTERY_DEAD     = 14,
                SSM_G2_POWER_WAIT       = 15,
                SSM_G2_RESET_WAIT       = 16,
                SSM_G3_AC               = 17,
                SSM_G2_ACPWR_WAIT       = 18,
                SSM_G2_ACRST_WAIT       = 19
              }
 
 
{pwm\0\0\0\0 K_DESC_STRPWMValue typedef
typedef UInt16 PWMValue;
   0xFFFF is full-on, 0x0 is full-off.